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Job: Design Verification Engineer

Active since 30-01-2018 Job category IT - Software Development
Location Ramallah, Palestine Level Entry level / Graduate
Educational level Bachelor / Graduate Employment type Permanent contract
Hours 40 - 50 Salary -
We are looking for an outstanding university graduates or engineers with one year of relevant experinece. The job requires a passion to verify the quality of the hardware design and debug tools. The engineer will objectively investigate and stress new features and expose weaknesses in their implementation.

The engineer will develop and maintain product’s logic validation including full ownership on the random system and validation scripts, find bugs and add new tests features to enhance the verification capabilities, integrate tests

Technical Requirements:

  • BS graduate in Computer Science or Computer Engineering.
  • Background in software testing – advantage.
  • Knowledge in Verilog HDL language – advantage.
  • Object Oriented Programming skills – advantage.
  • Knowledge of Unix/Linux – advantage.
  • Knowledge in script writing – advantage.
  • Familiar with text editors such as vi and emacs.
  • Out of the box thinking, in order to challenge the feature implementation.
Desired Personality Characteristic:

  • Independent learner.
  • Independent worker and problem-solver.
  • Good interpersonal relationships.
  • Ability to convey opinion and requirements.
  • Strong English communication skills.
More information
This listing is a full-time job

Job category IT - Software Development
Industry / Industries IT
Region Palestine
Keywords Design Verification, Verilog, VHDL, OOP, JAVA

Contact information

Name Emad Hamadeh